Electrical Engineering and Computer Science

Theses by Dr. Mohammed Niamat

List of selected theses and dissertations supervised by Dr. Mohammed Niamat.

MS Theses & Projects

  • Sowmya Panuganti, Thesis Title: Built In Self Test at Nano Scale, Fall 2008.
  • Barathkumar Vasudevan, Thesis Title:Analysis of Interconnect Distribution and Influence of Electro Migration in FPGAs, Fall 2008.
  • Amrutha Asthana, Thesis Title: Modeling, Testing and Simulation of CLB and Programmable Interconnects of FPGAs in QCA Nanotechnology, August 2008.
  • Puneeta Bhadsavle, Thesis Title: Modeling and Testing of FPGA LUT at the Nano Scale Using Quantum Dot Cellular Automata, February 2008.
  • Manoj Lalla, Thesis Title: Test, Diagnosis, and Simulation of Memory Faults in Virtex-4 SRAM Based FPGAs, December 2007.
  • Sarnath Santhanam, Thesis Title: JHDL Implementation of a Built-In Self Test Scheme for SRAM Based FPGAs, December 2006.

List of selected papers published by Dr. Mohammed Niamat.

  • M.Y. Niamat, Dileep Koleti, M. Alam , "Testing of LUT Delay Aliasing Faults in SRAM Based FPGAs Using Half Frequencies", IEEE International Midwest Symposium on Circuits and Systems, Montreal, Canada, August 5 -8, 2007
  • M.Y. Niamat, Arunjit Sahni, M. Jamali, "A Built In Self Test Scheme for Automatic Interconnect Fault Diagnosis in Multiple and Single FPGA Systems", IEEE International Midwest Symposium on Circuits and Systems, Montreal, Canada, August 5 -8, 2007.
  • M.Y. Niamat, Sarnath Santhanam, J. Kim, "JHDL Implementation of a BIST Scheme for Testing Carry Circuit Multiplexers of SRAM based FPGAs", Fifteenth ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA2007), Monterey, California, Feb. 18 - 20, 2007.
  • M.Y. Niamat, Sarnath Santhanam, Junghwan Kim, "JHDL Implementation of a BIST Scheme for Testing the Look-Up Tables of SRAM Based FPGAs", IEEE International Midwest Symposium on Circuits and Systems, San Juan, Puerto Rico, August 6-19, 2006.
  • M.Y. Niamat, Dinesh Nemade, M.M. Jamali,"Testing Embedded RAM Modules in SRAM-Based FPGAs", 2006 Fourteenth ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA2006), Monterey, California, Feb. 22-24, 2006.
  • M.Y. Niamat, Dinesh Nemade, M.M. Jamali,"Testing Embedded RAM Modules in SRAM-Based FPGAs", 2006 Fourteenth ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA2006), Monterey, California, Feb. 22-24, 2006.
  • M.Y. Niamat, Surya Hejeebu, M. Alam,"A BIST Approach for Testing FPGAs Using JBits", Proc. 2005 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 05), Napa, California, April 17-20, 2005, pp. 267-68.
Last Updated: 6/27/22