EECS 1100 - Digital Logic Design Course Syllabus
Credits/Contact Hours
4 credit hours & 160 minutes lecture and 150 minutes lab contact hours per week.
Textbook
Digital Design, 6th Edition, M. Morris Mano, Michael D. Ciletti, ISBN-13: 9780134549897
Course Information
Number representation and Boolean Algebra. Combinational circuit analysis and design. K-map and tabulation methods. Multiplexers, decoders, adders/subtractors and PLD devices. Sequential circuit analysis and design. Registers, counters, and recognizers.
Prerequisite: None
Elective or Required Course: Required.
Specific Goals - Student Learning Objectives (SLOs)
The student will be able to:
1) Convert signed/unsigned, integer/fixed-point decimal numbers to/from binary/hex representations; perform integer/fixed-point addition/subtraction using binary/hex number representations; and define precision and overflow for integer/fixed-point, signed/unsigned, addition/subtraction operations.
2) Define basic (AND, OR, NOT) and derived (e.g., NAND, NOR, XOR) Boolean operations; enumerate Boolean algebra laws and theorems; use basic and derived Boolean operations to evaluate Boolean expressions; and write and simplify Boolean expressions by applying appropriate laws and theorems and other techniques (e.g., Karnaugh maps).
3) Describe electrical representations of TRUE/FALSE; describe the high-impedance condition and logic gate implementation such as a tri-state buffer; and discuss the physical properties of logic gates such as fan-in, fan-out, propagation delay, power consumption, logic voltage levels, and noise margin and their impact on the constraints and tradeoffs of a design.
4) Implement Boolean expressions using the two-level gate forms of AND-OR, OR-AND, NAND-NAND, NOR-NOR and positive/negative conventions; and using multiple gating levels and positive/negative conventions.
5) Describe and design single-bit/multi-bit structure/operation of combinational building blocks such as multiplexers, demultiplexers, decoders, and encoders; describe and design the structure/operation of arithmetic building blocks such adders (ripple-carry), subtractor, shifters, and comparators; describe and design structures for improving adder performance such as carry lookahead and carry select; and analyze and design combinational circuits (e.g., arithmetic logic unit, ALU) in a hierarchical, modular manner, using standard and custom combinational building blocks.
6) Define a clock signal using period, frequency, and duty-cycle parameters; describe propagation delay, setup time, and hold time for basic latches and flip-flops; and analyze and create timing diagrams for sequential block operation.
7) Explain the structure/operation of basic latches (D, SR) and flip-flops (D, JK, T); describe and design the structure/operation of sequential building blocks such as registers, counters, and shift registers; enumerate design tradeoffs in using different types of basic storage elements for sequential building block implementation.
8) Describe the characteristics of static memory types such as static random-access memory (SRAM), and ROM.
9) Define important engineering constraints such as timing, performance, power, size, weight, cost, and their tradeoffs in the context of digital systems design.
10) Use a contemporary analysis/design/simulation software/hardware toolchain to prototype in hardware various digital logic circuits entailing combinational and sequential circuits.
Topics
- Number representation, number bases and base conversions, and binary codes
- Boolean algebra and functions, canonical forms
- Combinational design techniques: K-maps, tabulation method
- Combinational logic circuits: adders/subtractors, code converters, comparators, multiplexors, demultiplexers, decoders, and encoders
- Programmable logic circuits: read-only memory, programmable read-only memory (ROM/PROM), programmable logic devices (PLD), programmable logic arrays (PLA), and field programmable gate arrays (FPGA)
- Sequential logic circuits
- Latches and flip-flops,
- State behavior of synchronous sequential circuits: state tables
- Mealy-type and Moore-type sequential circuits
- Registers, counters, recognizers/sequence detectors and random-access memory (RAM)